The semiconductor chip of microcomputers, microprocessors, etc. are operated by the function of a series of clock pulses. For example, the microcomputer semiconductor chip called "80286" which can presently be obtained in the marketplace requires a series of clock pulses with frequency of 30 MHz. However, it is difficult to procure quartz oscillators suitable for generating 30 MHz, and moreover, they are expensive. Therefore, it is desirable to be able to obtain clock signal generators in which the frequency of about 30 MHz is generated by multiplying the frequency of a low frequency quartz oscillator which is low in cost and is presently obtainable in the marketplace.
A typical frequency multiplier of clock pulses uses the conventional phase lock loop technology. However, using a phase lock loop requires a voltage control oscillator, a phase comparator, a frequency divider and other circuits. This complicates the shape of the circuit and increases the cost of the multiplier.
A different type of frequency multiplier uses an exclusive-OR logic circuit which has been adapted so that input pulses are received at one input terminal while the integrated output of the input pulses integrated with a predetermined time constant when the duty cycle of said input pulse is essentially 50% is received at the other input terminal. Suppose the duty cycle of the input pulse is 50% and the time constant of the integration is suitably selected, an output in which the frequency is doubled can be obtained with an duty cycle of essentially 50%. However, when the frequency of the input pulse fluctuates, the duty cycle of the output with doubled-frequency varies in accordance to it. This makes it impossible to use the frequency multiplier as the clock pulse source of the semiconductor chip.